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Voice chip

CST5011A

    CST5011A series are 4-bits micro-controller which could play 4 channel melody or 4 channel ADPCM with PWM direct drive circuit. PWM resolution is 8/10/12 bits. They includes a low cost, high performance CMOS micro-processor. The clock frequency of this up is typically 8.192 (±3%) MHz. This chip operates over a wide voltage range of 2.0V~5.5V. It contains program ROM (PROM) and data ROM (DROM) inside. The maximum program ROM is 4K words and maximum data ROM size is 33K byte. The maximum working SRAM is (64+2) nibbles. It is provided with total 4 software programmable I/O Ports.
    CST5011A General Descriptions:
        CST5011A series are 4-bits micro-controller which could play 4 channel melody or 4 channel ADPCM with PWM direct drive circuit. PWM resolution is 8/10/12 bits. They includes a low cost, high performance CMOS micro-processor. The clock frequency of this up is typically 8.192 (±3%) MHz. This chip operates over a wide voltage range of 2.0V~5.5V. It contains program ROM (PROM) and data ROM (DROM) inside. The maximum program ROM is 4K words and maximum data ROM size is 33K byte. The maximum working SRAM is (64+2) nibbles. It is provided with total 4 software programmable I/O Ports.

    CST5011A Features:
      Operating voltage: 2.0V to 5.5V
      MCU Operation frequency: 8.192MHz
      Memory Size
        -Program ROM size: 4K*12-bits OTP type
        -Data ROM size: 33K*8-bits OTP type
        -SRAM size: 64*4 bits
        -User register: 2*4 bits
      Wakeup function for power-down mode:
        -HALT mode wakeup source: Port A can wake-up from HALT mode to NORMAL mode and executing wake-up sub-routine program.
      4 input/output pins: Port A can be defined as input or output port bit by bit.
      Three reset condition:
        -Low voltage reset. (LVR = 2.0V)
        -Power on reset.
        -Watch dog timer overflow.
      One internal interrupt sources:
        -PWM interrupt.
      WDT
        -Watch dog timer, can enabled/disabled by option.
        -WDT period is 256*256*16/Fsys. (WDT period is 0.13 sec for system clock=8.192MHz)
    Audio output:
        -Support PWM or DAC mode by option.
        -Support 8/10/12 bits.
      Support option set for pull down resistor 1M, 50K or 220K Ohm, low voltage reset…etc.
      Oscillator fuse option ±3%, temperature & voltage compensation.
      Support security option (1 bit) for read inhibition.
      Support 16-levels LVD function.

    CST5011A provides SOP8 package:

    CST5011A Block Diagram:

    CST5011A Speaker wakeup structure:

    CST5011A The Application Circuit:

    CST5011A DAC Selected by option:

    Notice:
    1. Regarding recording or remote car applications, please reference application note on web site.
    2. C1 : 47 uF ~ 100 uF(depends on applications), C2:0.1 uF
    3. DAC Applications circuit not support PWM wakeup function.
    4. DAC Applications, please reference application note on web site.
    Please submit your basic information and send an email Sales@ChipSourceTek.com , or call us at 13823761625 (the same number as wechat), and we will contact you as soon as possible!

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